China seeks to 'push the limits' with 3D stacking technology
On July 4, after two years of quiet operation, Dongfang Suanxin announced its website and social network accounts. The company founded in May 2024 positions itself as a "new but formidable enterprise" in the Chinese AI computing field, building an autonomous AI chip ecosystem with two goals: Software-defined Chip, and 3D Near-Memory Computing.
Software-defined chips are microprocessors that possess a hardware structure that can be flexibly changed, reconfigured, or upgraded in functionality via software after it has been manufactured. Meanwhile, 3D Near-Memory Computing Architecture is a chip design model that stacks memory layers on top or right next to the processor, helping data travel extremely short distances, solving "bottlenecks" in speed and energy.
Dongfang Suanxin was founded by Wei Shaojun with 500 employees, but "hidden" for a long time, according to AIFun. In addition to its headquarters in Shanghai, this startup also has research and development branches in 7 cities, including Beijing and Shenzhen. Mr. Shaojun is also a voice in the industry, being a professor at the School of Integrated Circuits at Tsinghua University, and Vice Chairman of the China Semiconductor Industry Association.
According to ChinaFund, Dongfang Suanxin has raised capital twice, currently valued at 1.7 billion USD. The debut product is DF1000, a high-performance AI accelerator based on 3D Near-Memory Compute Architecture, providing a standardized interface that seamlessly adapts to major domestic original equipment manufacturer (OEM) AI server platforms, supporting training and inference for large-scale artificial intelligence models.
Main direction
Dongfang Suanxin's decision to reveal its 3D chip production strategy took place shortly after Huawei announced a technological breakthrough that helped create 1.4 nm chips by 2031. Instead of relying on Moore's Law, which aims to shrink transistors, Huawei introduced a new Tau Expansion Law to help improve chips, focusing on reducing the time signals and data take to pass through the processor. Production also does not require ultra-ultraviolet (EUV) lithography machines that China has difficulty accessing, instead "folding" traditional 2D circuits into vertical 3D structures, that is, stacking chips on top of each other.
According to NBC News, Huawei's announcement attracted great attention. Some call this the "DeepSeek moment" of the chip industry, others say that the US restrictions are encouraging innovation. Nvidia CEO Jensen Huang also assessed the new architecture that Huawei is pursuing as a "breakthrough", although it does not pose any immediate threat.
For many years, China's semiconductor ambitions have largely revolved around closing the gap in manufacturing progress with the world. But in the face of restrictions on access to EUV photolithography machines and export control measures from Washington, the country is shifting its focus to 3D chip architecture and advanced packaging technology (Advanced packaging), according to SCMP.
Instead of just increasing the number of transistors on a plane according to Moore's law, China is aiming for solutions including hybrid-bonding (stacking and directly connecting microscopic chips), chiplets (modular design) and 3D stacking (chips or semiconductor components stacked vertically and directly connected) to increase computing density, bandwidth and energy efficiency. These are considered important directions to help maintain the momentum of AI chip development in the "post-Moore's law era".
3D solutions are expected to bring great potential. For example, Huawei's LogicFolding allows the total number of transistors to double, thereby improving transistor density by 50% and power efficiency by 40% without using EUV equipment, even allowing the production of 3 nm chips using a 7 nm process.
China's YMTC (Yangtze Memory) was the first company to introduce hybrid-bonding technology in the field of NAND memory chips. CXMT (Changxin Memory) also actively promotes 3D DRAM development. Tom's Hardware quoted sources as saying that YMTC is transferring this technology to CXMT to facilitate the transition, while Huawei has established a close technology alliance with both.
According to PanDaily statistics, Tsingway is currently developing a new generation AI chip based on 3.5D heterogeneous stacking technology to help increase data throughput and computing density; Suanmiao Technology completed the A4E TokenPU chip design with 8 memory layers stacked on the logic layer, achieving memory bandwidth of up to TB/s; Lingchuan Technology developed the SL200 3D chip that has been applied to Alibaba Cloud, Baidu Cloud and Bilibili.
Other units are researching optimal solutions using 3D. For example, Unisplendour's Zixuan architecture targets DRAM to reach 30 TB/s bandwidth, Intellifusion has an inference method that integrates 3D stacked memory to increase bandwidth and reduce data access latency, JCET is investing heavily in 2.5D/3D packaging, or TongFu owns many patents related to hybrid-bonding, 3D Near-Memory Computing.
From an industry-wide perspective, the Global Twitter China Semiconductor ETF investment fund believes that 3D chip manufacturing technology is bringing great significance to China. If successful, domestic semiconductor businesses can narrow or at least maintain the technology gap with the US instead of being further behind.
Barrier series
Despite the push, in fact the Chinese semiconductor industry is considered to still be "stuck" at the 5 nm process, even the country's company's capacity to only mass produce chips at the 7 nm process. Meanwhile, TSMC (Taiwan) has planned to mass produce 1.4 nm chips in 2028, meaning the gap with the world will widen significantly after this time. If Huawei can use 3D technology to produce 3 nm chips in 2028 and 1.4 nm in 2031 as claimed, the gap will narrow.
Industry experts admit there are still many barriers to overcome. Ms. He Tingbo, in charge of Huawei's semiconductor segment, said that although the company's new approach is groundbreaking, it still faces great difficulties, such as having to create new design tools that comply with Tau's Law of Expansion and prevent overheating, from chips for mobile devices to AI data centers.
According to Shanghai-based semiconductor research firm ICwise, folding circuits into multiple active layers increases heat density by 5-10 times, meaning the chip can get very hot when operating. Furthermore, converting the method from 2D to 3D requires specialized chip design tools, which is a limiting factor in China.
A number of domestic companies are focusing on this solution, such as Empyrean Technology last month, which said it had developed a 3D integrated circuit generation system with the goal of becoming "an important means to realize the Tau Expansion Law". However, this unit has not announced a specific strategy.
Production is also another issue. According to ICwise, achieving commercially viable yield rates when stacking three or four active layers is still an extremely difficult task.
In this context, Chinese semiconductor enterprises still express optimism with 3D chip manufacturing technology, but call for the government to have stronger policies to promote development and recruit talent. Speaking at a conference in Shenzhen in June, Mr. Shaojun said that more incentive mechanisms are needed to help train elite experts for new technologies. He noted the domestic semiconductor industry is "very fragmented" with 87% of chip design companies being small-scale, with fewer than 100 employees.
Speaking to the Global Times earlier this year, Shaojun also called on the domestic industry to maintain "high vigilance" and maintain its commitment to building capacity for advanced technologies.