ASML, TSMC, and Imec Successfully Fabricate 2D Material Transistors

At this week's 2026 Symposium on VLSI Technology and Circuits in Hawaii, the Imec semiconductor research center (Belgium), lithography equipment manufacturer ASML (Netherlands), and leading chip foundry TSMC (Taiwan) announced a commercial manufacturing process for transistors using 2D materials.

The trio successfully co-fabricated complementary nFET and pFET transistors on a standard 300mm wafer with an ultra-scaled contacted poly pitch (CPP) of 50nm. This marks the first time that complementary 2D transistors have achieved this size using processes compatible with modern industrial semiconductor fabs.

According to Tom's Hardware, for over 50 years, the global chip industry has operated under Moore's Law, packing more transistors into processors to make computing faster, cheaper, and more energy-efficient. However, silicon—the foundational material for modern computer chips—is reaching its physical limits. When transistors get too small, current leakage increases, leading to wasted energy, excessive heat, and degraded device performance. While technologies like FinFET and Gate-All-Around (GAA) have extended silicon's life, experts agree a new material is needed to continue scaling.

2D materials are among the most promising candidates. Unlike traditional 3D materials, 2D materials are only a few atoms thick. Due to this extreme thinness, they provide far superior gate control, virtually eliminating current leakage. However, the greatest challenge for years has been moving 2D materials from lab environments to high-volume manufacturing fabs. Fabricating a few test chips in a research facility is vastly different from producing billions of transistors on large wafers with high yields.

The breakthrough from the Imec-ASML-TSMC alliance lies in optimizing this exact process. By combining ASML's EUV lithography with a backside thin-film transistor architecture, they scaled the channel length down to 28nm, achieving a transistor yield of 94% across the entire 300mm wafer.

This achievement is significant because it brings together three powerhouses of the global semiconductor supply chain: Imec's advanced research, ASML's proprietary lithography equipment, and TSMC's world-leading manufacturing scale.

ASML's involvement ensures that these new 2D transistors can be patterned using existing EUV lithography machines. Consequently, chipmakers will not need to abandon their multi-billion-dollar fabs to adopt the new technology. Meanwhile, the presence of TSMC—the foundry for Apple, Nvidia, and AMD—signals high confidence in the technology's eventual commercialization.

The boom of artificial intelligence is causing data centers to consume massive amounts of power. On the consumer side, running AI models locally on devices demands faster processors and larger batteries. 2D transistors are envisioned as a solution. By delivering high performance at extremely low power levels, they promise smartphones with exceptional battery life, fanless ultra-thin laptops, and AI supercomputers operating at unprecedented speeds.

However, commercializing 2D chips will not happen overnight. The path from process optimization to mass production in the semiconductor industry typically takes a decade. Experts project the first commercial applications of 2D material chips will appear around 2030, starting in specialized high-performance computing systems before trickling down to consumer mobile devices.

(Sources: VnExpress, Tom's Hardware, Imec.)